W949D2CBJX5E【PDF 2/60 页】IC LPDDR SDRAM 512MBIT 90VFBGA

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W949D6CB / W949D2CB

512Mb Mobile LPDDR

7.3 Mode Register Set.................................................................................................................. 25

7.3.1 Mode Register Set Command ........................................................................................................ 25

7.3.2 Mode Register Set Command Timing ............................................................................................ 26

7.4. Active .................................................................................................................................... 26

7.4.1 Active Command ............................................................................................................................ 26

7.4.2 Bank Activation Command Cycle ................................................................................................... 27

7.5. Read ..................................................................................................................................... 27

7.5.1 Read Command ............................................................................................................................. 28

7.5.2 Basic Read Timing Parameters ..................................................................................................... 28

7.5.3 Read Burst Showing CAS Latency ................................................................................................ 29

7.5.4 Read to Read ................................................................................................................................. 29

7.5.5 Consecutive Read Bursts ............................................................................................................... 30

7.5.6 Non-Consecutive Read Bursts ....................................................................................................... 30

7.5.7 Random Read Bursts ..................................................................................................................... 31

7.5.8 Read Burst Terminate .................................................................................................................... 31

7.5.9 Read to Write ................................................................................................................................. 32

7.5.10 Read to Pre-charge ...................................................................................................................... 32

7.5.11 Burst Terminate of Read .............................................................................................................. 33

7.6 Write....................................................................................................................................... 33

7.6.1 Write Command ............................................................................................................................. 34

7.6.2 Basic Write Timing Parameters ...................................................................................................... 34

7.6.3 Write Burst (min. and max. tDQSS) ............................................................................................... 35

7.6.4 Write to Write .................................................................................................................................. 35

7.6.5 Concatenated Write Bursts ............................................................................................................ 36

7.6.6 Non-Consecutive Write Bursts ....................................................................................................... 36

7.6.7 Random Write Cycles..................................................................................................................... 37

7.6.8 Write to Read ................................................................................................................................. 37

7.6.9 Non-Interrupting Write to Read ...................................................................................................... 37

7.6.10 Interrupting Write to Read ............................................................................................................ 38

7.6.11 Write to Precharge ....................................................................................................................... 38

7.6.12 Non-Interrupting Write to Precharge ............................................................................................ 38

7.6.13 Interrupting Write to Precharge .................................................................................................... 39

7.7 Precharge............................................................................................................................... 39

7.7.1 Precharge Command ..................................................................................................................... 40

7.8 Auto Precharge ...................................................................................................................... 40

7.9 Refresh Requirements............................................................................................................ 40

7.10 Auto Refresh ........................................................................................................................ 40

7.10.1 Auto Refresh Command ............................................................................................................... 41

7.11 Self Refresh ......................................................................................................................... 41

7.11.1 Self Refresh Command ................................................................................................................ 42

7.11.2 Auto Refresh Cycles Back-to-Back .............................................................................................. 42

7.11.3 Self Refresh Entry and Exit .......................................................................................................... 43

7.12 Power Down ......................................................................................................................... 43

7.12.1 Power-Down Entry and Exit ......................................................................................................... 43

7.13 Deep Power Down ............................................................................................................... 44

Publication Release Date: Sep, 21, 2011

-2-

Revision A01-007

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